Freescale Semiconductor /MKW21Z4 /XCVR_TSM_REGS /TIMING10

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Interpret as TIMING10

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BB_XTAL_PLL_REF_CLK_EN_TX_HI 0BB_XTAL_PLL_REF_CLK_EN_TX_LO 0BB_XTAL_PLL_REF_CLK_EN_RX_HI 0BB_XTAL_PLL_REF_CLK_EN_RX_LO

Description

TSM_TIMING10

Fields

BB_XTAL_PLL_REF_CLK_EN_TX_HI

Assertion time setting for BB_XTAL_PLL_REF_CLK_EN (TX)

BB_XTAL_PLL_REF_CLK_EN_TX_LO

De-assertion time setting for BB_XTAL_PLL_REF_CLK_EN (TX)

BB_XTAL_PLL_REF_CLK_EN_RX_HI

Assertion time setting for BB_XTAL_PLL_REF_CLK_EN (RX)

BB_XTAL_PLL_REF_CLK_EN_RX_LO

De-assertion time setting for BB_XTAL_PLL_REF_CLK_EN (RX)

Links

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